Back annotation from PADS PowerPCB (Lepton EDA Reference Manual 1.9.18)

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6.11.2 Back annotation of PADS PowerPCB layout changes to Lepton schematic

Backannotation is the process of updating schematics to reflect changes made in the layout. This process is used, for example, when the reference designators have been renumbered on the layout, when pins have been swapped (e.g., on an AND gate), or slots have been swapped (e.g., on a multi-gate package). This section describes how to backannotate changes in a PADS PowerPCB layout to a Lepton schematic. The PADS PowerPCB tool supports three types of schematic backannotation:

Reference designator changes. This is often times used at the end of a layout to give components which are geographically close a set of reference designators which are numerically close.
Slot swapping. This is commonly found in digital designs where there may be multiple identical gates in a single package. For example, you may wish to swap which slot is used in a hex inverter.
Pin swapping. During layout, the designer may wish to swap equivalent pins on a chip. For example, the two inputs on a NAND gate.

Currently only reference designator changes are automatically processed by the PADS to lepton-schematic backannotation tool. The slot and pin swapping changes are provided in a report which the schematic designer must use to manually correct the schematic.

Detailed backannotation procedure

6.11.2.1 Detailed backannotation procedure

This procedure assumes you have a board layout open in PADS. For the purposes of illustration, assume your schematic is split into two pages in the files pg1.sch and pg2.sch.

Create an up to date PADS netlist by running:
lepton-netlist -g pads -o mynet.asc pg1.sch pg2.sch

This will create the netlist file mynet.asc.
From within PADS, choose the Tools → Compare Netlist menu item and choose the following options in the form:

original design to compare	mynet.asc
new design with changes	use current PCB design
√	generate differences report
√	generate eco file

comparison options
√	compare only ECO registered parts

attribute comparison level
√	ignore all attributes

Click the ‘OK’ button to create the ECO file.

Examine the ECO file to make sure it looks ok (the ECO file is a text file which can be viewed with any text editor).
Make a backup copy of your Lepton schematic files in case things fail in a destructive way.
Run:
pads_backannotate file.eco pg1.sch pg2.sch | tee backanno.log

where file.eco is the name of the ECO file created previously and pg1.sch and pg2.sch are all of your schematic pages. This will apply the reference designator change portion of the ECO file and also generate a list of pin and slot swapping which must be performed by hand. The file backanno.log will contain a log of the session that can be refered to when performing the pin and slot swapping.