1 v 20211219 2
 2 C 40800 41500 1 0 0 vdc-1.sym
 3 {
 4 T 41500 42000 21 10 1 1 0 0 1
 5 refdes=V1
 6 T 41500 42350 5 10 0 0 0 0 1
 7 device=VOLTAGE_SOURCE
 8 T 41400 41800 5 8 1 0 0 0 1
 9 value=DC 1V
10 T 41400 41600 1 8 1 0 0 0 1
11 footprint=HEADER2_1.fp
12 }
13 N 41800 42800 41100 42800 4
14 {
15 T 41450 42850 6 8 1 1 0 3 1
16 netname=vcc
17 }
18 N 44400 42800 45300 42800 4
19 C 41000 41000 1 0 0 gnd-1.sym
20 N 43500 42800 42700 42800 4
21 {
22 T 43100 42850 6 8 1 1 0 3 1
23 netname=mid
24 }
25 N 41100 41300 41100 41500 4
26 N 45300 42800 45300 41400 4
27 N 45300 41400 41100 41400 4
28 N 41100 42800 41100 42700 4
29 C 41800 42700 1 0 0 resistor-1.sym
30 {
31 T 42100 43100 5 10 0 0 0 0 1
32 device=RESISTOR
33 T 42000 43000 5 10 1 1 0 0 1
34 refdes=R1
35 T 42000 42500 5 8 1 0 0 0 1
36 value=500
37 T 42000 42300 1 8 1 0 0 0 1
38 footprint=1206.fp
39 T 42000 43400 5 10 0 0 0 0 1
40 symversion=0.1
41 }
42 C 43500 42700 1 0 0 resistor-1.sym
43 {
44 T 43800 43100 5 10 0 0 0 0 1
45 device=RESISTOR
46 T 43700 43000 5 10 1 1 0 0 1
47 refdes=R2
48 T 43700 42500 5 8 1 0 0 0 1
49 value=500
50 T 43700 42300 1 8 1 0 0 0 1
51 footprint=1206.fp
52 T 43700 43400 5 10 0 0 0 0 1
53 symversion=0.1
54 }